Hardware revision 2 (eepyBoard v1.1) #1
39
README.md
39
README.md
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@ -5,10 +5,19 @@ Custom ergonomic mechanical keyboard with low-profile (Choc) switches.
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## Versions
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## Versions
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- **eepyBoard v1.0: Hardware revision 1**
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- **eepyBoard v1.0: Hardware revision 1**
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- Mostly ortholinear layout with 13 columns
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- Mostly ortholinear layout with 13 columns (73 keys + rotary encoder)
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- Bottom row: two regular keys + four thumb keys (per side, symmetrical)
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- Bottom row: two regular keys + four thumb keys (per side, symmetrical)
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- Partial F-key row (Esc, F1-F8) and rotary encoder
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- Partial F-key row (Esc, F1-F8) and rotary encoder
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- RP2040 controller board in upper right corner
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- RP2040 controller board in upper right corner
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- **eepyBoard v1.1: Hardware revision 2**
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- Column staggered split layout (single board) with a total of 15 columns and 6 rows (88 keys + 2 rotary encoders)
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- Each side has 7 columns by 5 rows (not counting function keys and arrow keys)
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- Bottom row: three regular keys + four thumb keys on each side, and an additional centered thumb key
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- Full F-key row (Esc, F1-F12)
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- 4 arrow keys in the center
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- 2 pressable rotary encoders (one in the center of the keyboard, one in the upper right)
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- Compact RP2040 "Pico Mini" controller board in the center
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## Repository structure
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## Repository structure
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@ -36,31 +45,35 @@ Copy the file to `kicad/eepyboard.kicad_pcb`.
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Open the file in KiCad (create a project if non exists yet). Finalize the PCB in KiCad.
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Open the file in KiCad (create a project if non exists yet). Finalize the PCB in KiCad.
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1. Run the Design Rules Checker. Check the errors. Most of them can be ignored/excluded.
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1. Round off the bottom corners of the board outline:
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- Remove the bottom center line and the two small fillet arcs next to it.
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- Select the two remaining bottom lines. Right click them and use "Shape Modification -> Extend Lines to Meet".
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- Right click the two angled lines again. Use "Shape Modification -> Fillet Lines..." with a 200mm radius.
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2. Run the Design Rules Checker. Check the errors. Most of them can be ignored/excluded.
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- All "Footprint not found in libraries" can be ignored completely. This is due to how Ergogen generates the PCB.
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- All "Footprint not found in libraries" can be ignored completely. This is due to how Ergogen generates the PCB.
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2. Add VCC and GND planes.
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3. Add VCC and GND planes.
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- Menu: `File -> Board Setup`
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- Menu: `File -> Board Setup`
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- On "Physical Stackup", change the copper layer number to 4.
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- On "Physical Stackup", change the copper layer number to 4.
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- On "Board Editor Layers", change the type of `In1.Cu` and `In2.Cu` to "power plane".
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- On "Board Editor Layers", change the type of `In1.Cu` and `In2.Cu` to "power plane".
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- NOTE: `In1.Cu` will be the VCC plane, `In2.Cu` will be a GND plane.
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- NOTE: `In1.Cu` will be the VCC plane, `In2.Cu` will be a GND plane.
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3. Add filled zones to the VCC and GND planes.
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4. Add filled zones to the VCC and GND planes.
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- Select the `In1.Cu` layer.
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- Select the `In1.Cu` layer.
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- Use the "Add a filled zone" tool and draw a rectangle that contains the entire board. Assign the zone to VCC.
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- Use the "Add a filled zone" tool and draw a rectangle that contains the entire board. Assign the zone to VCC.
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- Repeat the same process for the `In2.Cu` layer and assign the zone to GND.
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- Repeat the same process for the `In2.Cu` layer and assign the zone to GND.
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- The zones don't need to be filled just yet.
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- The zones don't need to be filled just yet.
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4. Add another filled zone on the `B.Cu` layer and assign it to GND.
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5. Add another filled zone on the `B.Cu` layer and assign it to GND.
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5. Route all signal traces (no VCC or GND yet). Recommended order:
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6. Route all signal traces (no VCC or GND yet). Recommended order:
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- Matrix rows (on `B.Cu`)
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- Matrix rows (on `B.Cu`)
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- Matrix columns (with vias on `F.Cu`)
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- Matrix columns (with vias on `F.Cu`)
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- NeoPixel data pins
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- NeoPixel data pins
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- Connect everything to the MCU.
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- Connect everything to the MCU.
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6. Route VCC traces.
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7. Route VCC traces.
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- Connect the VCC traces between the NeoPixel chips and the capacitors with a 0.750 mm track.
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- Connect the VCC traces between the NeoPixel chips and the capacitors with a 0.750 mm track.
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- Place free-standing vias (Ctrl+Shift+V) in the middle of the just created VCC traces.
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- Place free-standing vias (Ctrl+Shift+V) in the middle of the just created VCC traces.
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7. Route GND traces.
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8. Route GND traces.
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- Draw short GND traces with a 0.750 mm track and a via at the end next to the GND pads of the NeoPixel chips.
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- Draw short GND traces with a 0.750 mm track and a via at the end next to the GND pads of the NeoPixel chips.
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8. Fill all zones by pressing B. Make sure that all nets are routed.
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9. Fill all zones by pressing B. Make sure that all nets are routed.
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9. Run the Design Rules Checker and make sure there are no (relevant) violations.
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10. Run the Design Rules Checker and make sure there are no (relevant) violations.
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#### Export Gerber files
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#### Export Gerber files
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