From 8c7b62dc2d657246fff07cf1966d081127fab791 Mon Sep 17 00:00:00 2001 From: binaryDiv Date: Sat, 3 Apr 2021 17:21:59 +0200 Subject: [PATCH] Import code from old repository from 2018 Old repository: https://github.com/binaryDiv/z80_computer --- .gitignore | 10 + firmware_src/BitIO.h | 44 ++ firmware_src/Makefile | 75 +++ firmware_src/config.h | 12 + firmware_src/eeprom.c | 117 +++++ firmware_src/eeprom.h | 48 ++ firmware_src/main.c | 24 + firmware_src/protocol.c | 142 ++++++ firmware_src/protocol.h | 16 + firmware_src/uart.c | 94 ++++ firmware_src/uart.h | 22 + kicad/README | 5 + kicad/eepprog-cache.lib | 274 ++++++++++ kicad/eepprog.kicad_pcb | 1064 +++++++++++++++++++++++++++++++++++++++ kicad/eepprog.net | 388 ++++++++++++++ kicad/eepprog.pro | 30 ++ kicad/eepprog.sch | 489 ++++++++++++++++++ pin_allocation.txt | 85 ++++ prog_tool/eepprog.py | 137 +++++ 19 files changed, 3076 insertions(+) create mode 100644 .gitignore create mode 100644 firmware_src/BitIO.h create mode 100644 firmware_src/Makefile create mode 100644 firmware_src/config.h create mode 100644 firmware_src/eeprom.c create mode 100644 firmware_src/eeprom.h create mode 100644 firmware_src/main.c create mode 100644 firmware_src/protocol.c create mode 100644 firmware_src/protocol.h create mode 100644 firmware_src/uart.c create mode 100644 firmware_src/uart.h create mode 100644 kicad/README create mode 100644 kicad/eepprog-cache.lib create mode 100644 kicad/eepprog.kicad_pcb create mode 100644 kicad/eepprog.net create mode 100644 kicad/eepprog.pro create mode 100644 kicad/eepprog.sch create mode 100644 pin_allocation.txt create mode 100755 prog_tool/eepprog.py diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..802bd71 --- /dev/null +++ b/.gitignore @@ -0,0 +1,10 @@ +# C code: object files etc. +*.o +*.obj +*.elf +*.hex +*.gch +*.pch + +# vim swap files +.*.swp diff --git a/firmware_src/BitIO.h b/firmware_src/BitIO.h new file mode 100644 index 0000000..1cb6eb4 --- /dev/null +++ b/firmware_src/BitIO.h @@ -0,0 +1,44 @@ +/** + * BitIO.h + * @author Andi Dittrich + * @version 1.0 + * @license MIT Style X11 License +*/ + + +#include +#include + +#ifndef BITIO_H_ +#define BITIO_H_ + +// set bit +static inline void BIT_SET(volatile uint8_t *target, uint8_t bit) __attribute__((always_inline)); +static inline void BIT_SET(volatile uint8_t *target, uint8_t bit){ + *target |= (1< +#include +#include "BitIO.h" + +// Initialize EEPROM +void eepromInit() { + // Set initial value for control port (all disabled -- INVERTED VALUES, ~CE, ~OE, ~WE) + BIT_SET(&EEP_CTRL_PORT, EEP_CTRL_BIT_CE); + BIT_SET(&EEP_CTRL_PORT, EEP_CTRL_BIT_OE); + BIT_SET(&EEP_CTRL_PORT, EEP_CTRL_BIT_WE); + + // Set data direction register for control port + EEP_CTRL_DDR |= (1 << EEP_CTRL_BIT_CE) + | (1 << EEP_CTRL_BIT_OE) + | (1 << EEP_CTRL_BIT_WE); + + // Set initial value for address (0x0000) + EEP_ADDR_LOW_PORT = 0x00; + EEP_ADDR_HIGH_PORT = 0x00; + + // Set data direction register for address ports + EEP_ADDR_LOW_DDR = 0xFF; + EEP_ADDR_HIGH_DDR = 0xFF; + + // Set data direction register and initial value for IO port (initialize in reading mode) + EEP_DATA_PORT = 0x00; + EEP_DATA_DDR = 0x00; +} + +// Enable read mode (set data direction registers and enable output) +void eepromSetReadMode() { + // Reset control bits (shouldn't be necessary, but let's be safe) + BIT_SET(&EEP_CTRL_PORT, EEP_CTRL_BIT_CE); + BIT_SET(&EEP_CTRL_PORT, EEP_CTRL_BIT_OE); + BIT_SET(&EEP_CTRL_PORT, EEP_CTRL_BIT_WE); + + // Set data pins as input, reset PORT to disable pullups + EEP_DATA_PORT = 0x00; + EEP_DATA_DDR = 0x00; +} + +// Enable write mode (set data direction registers) +void eepromSetWriteMode() { + // Reset control bits (shouldn't be necessary, but let's be safe) + BIT_SET(&EEP_CTRL_PORT, EEP_CTRL_BIT_CE); + BIT_SET(&EEP_CTRL_PORT, EEP_CTRL_BIT_OE); + BIT_SET(&EEP_CTRL_PORT, EEP_CTRL_BIT_WE); + + // Set data pins as output, reset data port + EEP_DATA_PORT = 0x00; + EEP_DATA_DDR = 0xFF; +} + +// Set address +static inline void eepromSetAddress(address_t address) { + // Set low and high address bytes + // (We actually only have 15 bit, the 16th will just be ignored) + EEP_ADDR_LOW_PORT = address & 0xFF; + EEP_ADDR_HIGH_PORT = address >> 8; +} + +// Read byte (assumes we're in read mode) +uint8_t eepromReadByte(address_t address) { + // Assume we're in read mode + + // Set address + eepromSetAddress(address); + + // Latch address + BIT_CLEAR(&EEP_CTRL_PORT, EEP_CTRL_BIT_CE); + BIT_CLEAR(&EEP_CTRL_PORT, EEP_CTRL_BIT_OE); + + // 1 tick = 62.5 ns, EEPROM access time is 150 ns. + // 2 NOPs seem to be sufficient, but let's be sure. + _NOP(); + _NOP(); + _NOP(); + + // Get data + uint8_t byte = EEP_DATA_PIN; + + // Reset ~OE, ~CE + BIT_SET(&EEP_CTRL_PORT, EEP_CTRL_BIT_OE); + BIT_SET(&EEP_CTRL_PORT, EEP_CTRL_BIT_CE); + + // Read and return data byte + return byte; +} + +// Write byte (assumes we're in write mode) +void eepromWriteByte(address_t address, uint8_t data) { + // Assume we're in write mode + + // Set address + eepromSetAddress(address); + + // Falling edge: latch address + BIT_CLEAR(&EEP_CTRL_PORT, EEP_CTRL_BIT_CE); + BIT_CLEAR(&EEP_CTRL_PORT, EEP_CTRL_BIT_WE); + + // Set data byte + EEP_DATA_PORT = data; + + // Data setup time (50ns) + _NOP(); + + // Rising edge: latch data, start write cycle + BIT_SET(&EEP_CTRL_PORT, EEP_CTRL_BIT_WE); + BIT_SET(&EEP_CTRL_PORT, EEP_CTRL_BIT_CE); + + // Write pulse width high (50ns) + _NOP(); +} + diff --git a/firmware_src/eeprom.h b/firmware_src/eeprom.h new file mode 100644 index 0000000..442fbf2 --- /dev/null +++ b/firmware_src/eeprom.h @@ -0,0 +1,48 @@ +#ifndef EEPROM_H_ +#define EEPROM_H_ + +#include "config.h" +#include + +// Define macro for NOP instruction +#define _NOP() __asm__ __volatile__ ("nop"); + +// Define type for (to be shifted) addresses +typedef uint16_t address_t; + +// Define address length +// TODO 15 or 16? +#define ADDRESS_LENGTH 15 + +// Macros for IO pins +#define EEP_ADDR_LOW_PORT PORTC +#define EEP_ADDR_LOW_DDR DDRC +#define EEP_ADDR_HIGH_PORT PORTB +#define EEP_ADDR_HIGH_DDR DDRB + +#define EEP_DATA_PORT PORTA +#define EEP_DATA_PIN PINA +#define EEP_DATA_DDR DDRA + +#define EEP_CTRL_PORT PORTD +#define EEP_CTRL_DDR DDRD +#define EEP_CTRL_BIT_CE PD2 +#define EEP_CTRL_BIT_OE PD3 +#define EEP_CTRL_BIT_WE PD4 + +// Initialize EEPROM +void eepromInit(); + +// Enable read mode (set data direction registers and enable output) +void eepromSetReadMode(); + +// Enable write mode (set data direction registers) +void eepromSetWriteMode(); + +// Read byte (assumes we're in read mode) +uint8_t eepromReadByte(address_t address); + +// Write byte (assumes we're in write mode) +void eepromWriteByte(address_t address, uint8_t data); + +#endif /* EEPROM_H_ */ diff --git a/firmware_src/main.c b/firmware_src/main.c new file mode 100644 index 0000000..b86772f --- /dev/null +++ b/firmware_src/main.c @@ -0,0 +1,24 @@ +#include "config.h" +#include "uart.h" +#include "eeprom.h" +#include "protocol.h" + +#include + +int main(void) { + // Init components (UART, EEPROM, ...) + uartInit(); + eepromInit(); + + // Initial pause (EEPROM needs 5ms startup time) + _delay_ms(100); + + // Write initial message via UART + uartPutString("INFO -- EEPROM programmer by binaryDiv\r\n"); + + while(1) { + // Run main loop endlessly + protocolMainLoop(); + } +} + diff --git a/firmware_src/protocol.c b/firmware_src/protocol.c new file mode 100644 index 0000000..52a376f --- /dev/null +++ b/firmware_src/protocol.c @@ -0,0 +1,142 @@ +#include "config.h" +#include "protocol.h" + +#include "uart.h" +#include "eeprom.h" + +#include +#include +#include + +// Splits a command "CMD ARGS" to two strings "CMD" and "ARGS". Returns pointer +// to "ARGS" or NULL if no arguments were found. Changes the input string! +char* tokenizeCommand(char* cmd) { + if (cmd == NULL) { + return NULL; + } + + // Search for a space character + for (char* p = cmd; *p != '\0'; p++) { + if (*p == ' ') { + // Split strings by replacing the space by \0, then return pointer + // to command arguments + *p++ = '\0'; + return p; + } + } + + // No space character found: command has no arguments, return NULL + return NULL; +} + +// Reads, parses and executes next command +void parseNextCommand() { + const int bufferLength = 80; + char buffer[bufferLength]; + + // Read next command + int readChars = uartGetLine(buffer, bufferLength); + + // Check if line is non-empty and has been read completely + if (readChars == 0) { + return; + } + else if (readChars >= bufferLength-1) { + // Reading was aborted after bufferLength-1 characters to prevent + // buffer overflow. + // TODO Actually this isn't quite correct: if exactly bufferLen-1 + // characters have been read including the \n, this could be + // true as well... test this? + uartPutString("ERROR buffer overflow while reading line\r\n"); + return; + } + + // Tokenize command + char* cmd = buffer; + char* args = tokenizeCommand(cmd); + + // Parse command + if (strcmp(cmd, "HELLO") == 0) { + // HELLO command: initializes connection + uartPutString("OHAI\r\n"); + } + else if (strcmp(cmd, "READ") == 0) { + // READ command: takes a hex address or address range as argument, + // reads data and returns them in hexadecimal ASCII format. + + // Check if arguments exist + if (args == NULL) { + uartPutString("ERROR READ needs an address\r\n"); + return; + } + + // Parse address(es) + // TODO + uartPutString(args); + + // Read... + // TODO + } + else if (strcmp(cmd, "TESTREAD") == 0) { + // TESTREAD command: for testing purposes, reads a few bytes and + // returns them in a human readable format. + + uint8_t byte; + char outBuffer[20]; + + eepromSetReadMode(); + + for (int i = 0x00; i < 0x20; i++) { + itoa(i, outBuffer, 16); + uartPutString("TESTREAD 0x"); + uartPutString(outBuffer); + uartPutString(": "); + + byte = eepromReadByte(i); + itoa(byte, outBuffer, 16); + + uartPutChar(byte); + uartPutString(" (0x"); + uartPutString(outBuffer); + uartPutString(")\r\n"); + } + } + else if (strcmp(cmd, "TESTWRITE") == 0) { + // TESTWRITE command: for testing purposes, writes a few bytes + + char str[] = "Ohai world"; + address_t addr = 0x00; + + char* writeStr = str; + if (args != NULL) { + writeStr = args; + } + + eepromSetWriteMode(); + + // write input line instead of static string + for (char* p = writeStr; *p != '\0'; p++) { + eepromWriteByte(addr, *p); + //_delay_ms(100); + addr++; + } + + // TODO necessary? + _delay_ms(100); + + uartPutString("TESTWRITE success\r\n"); + } + else { + // unknown command: return error message + uartPutString("ERROR invalid command\r\n"); + } +} + +// Runs main loop to parse commands +void protocolMainLoop() { + while(1) { + // Parse next command + parseNextCommand(); + } +} + diff --git a/firmware_src/protocol.h b/firmware_src/protocol.h new file mode 100644 index 0000000..57fc50e --- /dev/null +++ b/firmware_src/protocol.h @@ -0,0 +1,16 @@ +#ifndef PROTOCOL_H_ +#define PROTOCOL_H_ + +#include "config.h" +#include "protocol.h" + +#include "uart.h" +#include "eeprom.h" + +// Reads, parses and executes next command +void parseNextCommand(); + +// Runs main loop to parse commands +void protocolMainLoop(); + +#endif /* PROTOCOL_H_ */ diff --git a/firmware_src/uart.c b/firmware_src/uart.c new file mode 100644 index 0000000..287ad54 --- /dev/null +++ b/firmware_src/uart.c @@ -0,0 +1,94 @@ +#include "config.h" +#include "uart.h" + +#include +#include + +// Initialize UART +void uartInit() { + // Set Baud register + UBRRH = UBRRH_VALUE; + UBRRL = UBRRL_VALUE; + + // Reset status register + UCSRA = 0x00; + +#if USE_2X + // U2X mode necessary + UCSRA |= (1 << U2X); +#else + // U2X mode not necessary + UCSRA &= ~(1 << U2X); +#endif + + // Enable transmitter and receiver + UCSRB |= (1 << TXEN) | (1 << RXEN); + + // Set frame format (8 bit) + UCSRC = (1 << URSEL) | (1 << UCSZ1) | (1 << UCSZ0); +} + +// Transmit a single character +void uartPutChar(unsigned char data) { + // Block until controller is ready to send + while (!(UCSRA & (1 << UDRE))) { + } + + // Write character to UART data register + UDR = data; +} + +// Transmit a string +void uartPutString(char* data) { + // Write characters until \0 is reached + while (*data) { + uartPutChar(*data++); + } +} + +// Receive a single character (blocking) +unsigned char uartGetChar() { + // Block until a character has been received + while (!(UCSRA & (1 << RXC))) { + } + + // Get character and return + return UDR; +} + +// Receive a string until \n (blocking) +uint8_t uartGetLine(char* buffer, uint8_t maxLength) { + uint8_t readChars = 0; + unsigned char nextChar; + + // Read a maximum of maxLength-1 characters (-1 because we need one char for '\0') + while (readChars < maxLength - 1) { + // Get next character + nextChar = uartGetChar(); + + // Skip trailing \n and \r + if (nextChar == '\n' || nextChar == '\r') { + if (readChars == 0) { + // Skip trailing \n and \r + continue; + } + else { + // End line (do not append the \r or \n to the buffer) + break; + } + } + + // Write character to buffer + *buffer++ = nextChar; + + // Increment counter + readChars++; + } + + // Write a terminating '\0' byte + *buffer++ = '\0'; + + // Return number of read bytes (excluding the \0) + return readChars; +} + diff --git a/firmware_src/uart.h b/firmware_src/uart.h new file mode 100644 index 0000000..9be2f7e --- /dev/null +++ b/firmware_src/uart.h @@ -0,0 +1,22 @@ +#ifndef UART_H_ +#define UART_H_ + +#include "config.h" +#include + +// Initialize UART +void uartInit(); + +// Transmit a single character +void uartPutChar(unsigned char data); + +// Transmit a string +void uartPutString(char* data); + +// Read a single character (blocking) +unsigned char uartGetChar(); + +// Read a string until \n (blocking) +uint8_t uartGetLine(char* buffer, uint8_t maxLength); + +#endif /* UART_H_ */ diff --git a/kicad/README b/kicad/README new file mode 100644 index 0000000..088957e --- /dev/null +++ b/kicad/README @@ -0,0 +1,5 @@ +Note: The Kicad files seem to be broken. :( + +The actual hardware is built on a perfboard right now and slightly different to the Kicad scheme (?). + +TODO: Fix Kicad files to actually produce a PCB sometime. :3 diff --git a/kicad/eepprog-cache.lib b/kicad/eepprog-cache.lib new file mode 100644 index 0000000..edd4ca7 --- /dev/null +++ b/kicad/eepprog-cache.lib @@ -0,0 +1,274 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# 28C256 +# +DEF 28C256 U 0 40 Y Y 1 F N +F0 "U" 200 1000 50 H V C CNN +F1 "28C256" 300 -1000 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +X GND 14 0 -1000 50 U 50 50 0 0 W N +X VCC 28 0 1000 50 D 50 50 0 0 W N +S -400 950 400 -950 0 1 0 N +X A14 1 -700 -500 300 R 50 50 1 1 I +X A12 2 -700 -300 300 R 50 50 1 1 I +X A7 3 -700 200 300 R 50 50 1 1 I +X A6 4 -700 300 300 R 50 50 1 1 I +X A5 5 -700 400 300 R 50 50 1 1 I +X A4 6 -700 500 300 R 50 50 1 1 I +X A3 7 -700 600 300 R 50 50 1 1 I +X A2 8 -700 700 300 R 50 50 1 1 I +X A1 9 -700 800 300 R 50 50 1 1 I +X A0 10 -700 900 300 R 50 50 1 1 I +X CS 20 -700 -900 300 R 50 50 1 1 I L +X D0 11 700 900 300 L 50 50 1 1 T +X A10 21 -700 -100 300 R 50 50 1 1 I +X D1 12 700 800 300 L 50 50 1 1 T +X OE 22 -700 -800 300 R 50 50 1 1 I L +X D2 13 700 700 300 L 50 50 1 1 T +X A11 23 -700 -200 300 R 50 50 1 1 I +X A9 24 -700 0 300 R 50 50 1 1 I +X D3 15 700 600 300 L 50 50 1 1 T +X A8 25 -700 100 300 R 50 50 1 1 I +X D4 16 700 500 300 L 50 50 1 1 T +X A13 26 -700 -400 300 R 50 50 1 1 I +X D5 17 700 400 300 L 50 50 1 1 T +X WE 27 -700 -700 300 R 50 50 1 1 I L +X D6 18 700 300 300 L 50 50 1 1 T +X D7 19 700 200 300 L 50 50 1 1 T +ENDDRAW +ENDDEF +# +# ATMEGA16-16PU +# +DEF ATMEGA16-16PU U 0 40 Y Y 1 F N +F0 "U" -850 1880 50 H V L BNN +F1 "ATMEGA16-16PU" 450 -1950 50 H V L BNN +F2 "DIL40" 0 0 50 H I C CIN +F3 "" 0 0 50 H I C CNN +$FPLIST + 40DIP-ELL600 + 40dip600 +$ENDFPLIST +DRAW +S -850 1850 850 -1850 0 1 10 f +X (T0/XCK)PB0 1 1000 800 150 L 40 40 1 1 B +X (T1)PB1 2 1000 700 150 L 40 40 1 1 B +X (AIN0/INT2)PB2 3 1000 600 150 L 40 40 1 1 B +X (AIN1/OC0)PB3 4 1000 500 150 L 40 40 1 1 B +X (~SS~)PB4 5 1000 400 150 L 40 40 1 1 B +X (MOSI)PB5 6 1000 300 150 L 40 40 1 1 B +X (MISO)PB6 7 1000 200 150 L 40 40 1 1 B +X (SCK)PB7 8 1000 100 150 L 40 40 1 1 B +X ~RESET 9 -1000 1700 150 R 40 40 1 1 I +X VCC 10 -150 2000 150 D 40 40 1 1 W +X (ICP)PD6 20 1000 -1600 150 L 40 40 1 1 B +X AVCC 30 150 2000 150 D 40 40 1 1 W +X (ADC0)PA0 40 1000 1700 150 L 40 40 1 1 B +X GND 11 -50 -2000 150 U 40 40 1 1 W +X (OC2)PD7 21 1000 -1700 150 L 40 40 1 1 B +X AGND 31 50 -2000 150 U 40 40 1 1 W +X XTAL2 12 -1000 1300 150 R 40 40 1 1 B +X (SCL)PC0 22 1000 -100 150 L 40 40 1 1 B +X AREF 32 -1000 500 150 R 40 40 1 1 W +X XTAL1 13 -1000 900 150 R 40 40 1 1 B +X (SDA)PC1 23 1000 -200 150 L 40 40 1 1 B +X (ADC7)PA7 33 1000 1000 150 L 40 40 1 1 B +X (RXD)PD0 14 1000 -1000 150 L 40 40 1 1 B +X (TCK)PC2 24 1000 -300 150 L 40 40 1 1 B +X (ADC6)PA6 34 1000 1100 150 L 40 40 1 1 B +X (TXD)PD1 15 1000 -1100 150 L 40 40 1 1 B +X (TMS)PC3 25 1000 -400 150 L 40 40 1 1 B +X (ADC5)PA5 35 1000 1200 150 L 40 40 1 1 B +X (INT0)PD2 16 1000 -1200 150 L 40 40 1 1 B +X (TDO)PC4 26 1000 -500 150 L 40 40 1 1 B +X (ADC4)PA4 36 1000 1300 150 L 40 40 1 1 B +X (INT1)PD3 17 1000 -1300 150 L 40 40 1 1 B +X (TDI)PC5 27 1000 -600 150 L 40 40 1 1 B +X (ADC3)PA3 37 1000 1400 150 L 40 40 1 1 B +X (OC1B)PD4 18 1000 -1400 150 L 40 40 1 1 B +X (TOSC1)PC6 28 1000 -700 150 L 40 40 1 1 B +X (ADC2)PA2 38 1000 1500 150 L 40 40 1 1 B +X (OC1A)PD5 19 1000 -1500 150 L 40 40 1 1 B +X (TOSC2)PC7 29 1000 -800 150 L 40 40 1 1 B +X (ADC1)PA1 39 1000 1600 150 L 40 40 1 1 B +ENDDRAW +ENDDEF +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "C" 25 -100 50 H V L CNN +F2 "" 38 -150 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 50 50 1 1 P +X ~ 2 0 -150 110 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Conn_01x04 +# +DEF Conn_01x04 J 0 40 Y N 1 F N +F0 "J" 0 200 50 H V C CNN +F1 "Conn_01x04" 0 -300 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Connector*:*_??x*mm* + Connector*:*1x??x*mm* + Pin?Header?Straight?1X* + Pin?Header?Angled?1X* + Socket?Strip?Straight?1X* + Socket?Strip?Angled?1X* +$ENDFPLIST +DRAW +S -50 -195 0 -205 1 1 6 N +S -50 -95 0 -105 1 1 6 N +S -50 5 0 -5 1 1 6 N +S -50 105 0 95 1 1 6 N +S -50 150 50 -250 1 1 10 f +X Pin_1 1 -200 100 150 R 50 50 1 1 P +X Pin_2 2 -200 0 150 R 50 50 1 1 P +X Pin_3 3 -200 -100 150 R 50 50 1 1 P +X Pin_4 4 -200 -200 150 R 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Conn_02x03_Odd_Even +# +DEF Conn_02x03_Odd_Even J 0 40 Y N 1 F N +F0 "J" 50 200 50 H V C CNN +F1 "Conn_02x03_Odd_Even" 50 -200 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Connector*:*2x??x*mm* + Connector*:*2x???Pitch* + Pin_Header_Straight_2X* + Pin_Header_Angled_2X* + Socket_Strip_Straight_2X* + Socket_Strip_Angled_2X* +$ENDFPLIST +DRAW +S -50 -95 0 -105 1 1 6 N +S -50 5 0 -5 1 1 6 N +S -50 105 0 95 1 1 6 N +S -50 150 150 -150 1 1 10 f +S 150 -95 100 -105 1 1 6 N +S 150 5 100 -5 1 1 6 N +S 150 105 100 95 1 1 6 N +X Pin_1 1 -200 100 150 R 50 50 1 1 P +X Pin_2 2 300 100 150 L 50 50 1 1 P +X Pin_3 3 -200 0 150 R 50 50 1 1 P +X Pin_4 4 300 0 150 L 50 50 1 1 P +X Pin_5 5 -200 -100 150 R 50 50 1 1 P +X Pin_6 6 300 -100 150 L 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Crystal +# +DEF Crystal Y 0 40 N N 1 F N +F0 "Y" 0 150 50 H V C CNN +F1 "Crystal" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Crystal* +$ENDFPLIST +DRAW +S -45 100 45 -100 0 1 12 N +P 2 0 1 0 -100 0 -75 0 N +P 2 0 1 20 -75 -50 -75 50 N +P 2 0 1 20 75 -50 75 50 N +P 2 0 1 0 100 0 75 0 N +X 1 1 -150 0 50 R 50 50 1 1 P +X 2 2 150 0 50 L 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 75 50 H I C CNN +F1 "PWR_FLAG" 0 150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +X pwr 1 0 0 0 U 50 50 0 0 w +P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +F2 "" -70 0 50 V I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + R_* + R_* +$ENDFPLIST +DRAW +S -40 -100 40 100 0 1 10 N +X ~ 1 0 150 50 D 50 50 1 1 P +X ~ 2 0 -150 50 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# SW_Push +# +DEF SW_Push SW 0 40 N N 1 F N +F0 "SW" 50 100 50 H V L CNN +F1 "SW_Push" 0 -60 50 H V C CNN +F2 "" 0 200 50 H I C CNN +F3 "" 0 200 50 H I C CNN +DRAW +C -80 0 20 0 1 0 N +C 80 0 20 0 1 0 N +P 2 0 1 0 0 50 0 120 N +P 2 0 1 0 100 50 -100 50 N +X 1 1 -200 0 100 R 50 50 0 1 P +X 2 2 200 0 100 L 50 50 0 1 P +ENDDRAW +ENDDEF +# +# VCC +# +DEF VCC #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VCC" 0 150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +C 0 75 25 0 1 0 N +P 2 0 1 0 0 0 0 50 N +X VCC 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +#End Library diff --git a/kicad/eepprog.kicad_pcb b/kicad/eepprog.kicad_pcb new file mode 100644 index 0000000..5cfe4bd --- /dev/null +++ b/kicad/eepprog.kicad_pcb @@ -0,0 +1,1064 @@ +(kicad_pcb (version 4) (host pcbnew 4.0.7) + + (general + (links 57) + (no_connects 0) + (area 69.884999 71.357618 144.025001 134.287619) + (thickness 1.6) + (drawings 5) + (tracks 275) + (zones 0) + (modules 11) + (nets 38) + ) + + (page A4) + (layers + (0 F.Cu signal) + (31 B.Cu signal) + (32 B.Adhes user) + (33 F.Adhes user) + (34 B.Paste user) + (35 F.Paste user) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user) + (41 Cmts.User user) + (42 Eco1.User user) + (43 Eco2.User user) + (44 Edge.Cuts user) + (45 Margin user) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user) + (49 F.Fab user) + ) + + (setup + (last_trace_width 0.25) + (trace_clearance 0.2) + (zone_clearance 0.508) + (zone_45_only no) + (trace_min 0.2) + (segment_width 0.2) + (edge_width 0.15) + (via_size 0.6) + (via_drill 0.4) + (via_min_size 0.4) + (via_min_drill 0.3) + (uvia_size 0.3) + (uvia_drill 0.1) + (uvias_allowed no) + (uvia_min_size 0.2) + (uvia_min_drill 0.1) + (pcb_text_width 0.3) + (pcb_text_size 1.5 1.5) + (mod_edge_width 0.15) + (mod_text_size 1 1) + (mod_text_width 0.15) + (pad_size 1.524 1.524) + (pad_drill 0.762) + (pad_to_mask_clearance 0.2) + (aux_axis_origin 0 0) + (visible_elements FFFCFF7F) + (pcbplotparams + (layerselection 0x00030_80000001) + (usegerberextensions false) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15) + (hpglpenoverlay 2) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 1) + (scaleselection 1) + (outputdirectory "")) + ) + + (net 0 "") + (net 1 "Net-(C1-Pad1)") + (net 2 GND) + (net 3 "Net-(C2-Pad1)") + (net 4 "Net-(ICSP1-Pad1)") + (net 5 VCC) + (net 6 "Net-(ICSP1-Pad3)") + (net 7 "Net-(ICSP1-Pad4)") + (net 8 "Net-(U1-Pad1)") + (net 9 "Net-(U1-Pad21)") + (net 10 "Net-(U1-Pad2)") + (net 11 "Net-(U1-Pad22)") + (net 12 "Net-(U1-Pad3)") + (net 13 "Net-(U1-Pad23)") + (net 14 "Net-(U1-Pad4)") + (net 15 "Net-(U1-Pad24)") + (net 16 "Net-(U1-Pad5)") + (net 17 "Net-(U1-Pad25)") + (net 18 "Net-(U1-Pad26)") + (net 19 "Net-(U1-Pad27)") + (net 20 "Net-(U1-Pad28)") + (net 21 "Net-(U1-Pad29)") + (net 22 "Net-(U1-Pad33)") + (net 23 "Net-(U1-Pad14)") + (net 24 "Net-(U1-Pad34)") + (net 25 "Net-(U1-Pad15)") + (net 26 "Net-(U1-Pad35)") + (net 27 "Net-(U1-Pad16)") + (net 28 "Net-(U1-Pad36)") + (net 29 "Net-(U1-Pad17)") + (net 30 "Net-(U1-Pad37)") + (net 31 "Net-(U1-Pad18)") + (net 32 "Net-(U1-Pad38)") + (net 33 "Net-(U1-Pad19)") + (net 34 "Net-(U1-Pad39)") + (net 35 "Net-(U1-Pad20)") + (net 36 "Net-(U1-Pad40)") + (net 37 "Net-(C3-Pad1)") + + (net_class Default "This is the default net class." + (clearance 0.2) + (trace_width 0.25) + (via_dia 0.6) + (via_drill 0.4) + (uvia_dia 0.3) + (uvia_drill 0.1) + (add_net GND) + (add_net "Net-(C1-Pad1)") + (add_net "Net-(C2-Pad1)") + (add_net "Net-(C3-Pad1)") + (add_net "Net-(ICSP1-Pad1)") + (add_net "Net-(ICSP1-Pad3)") + (add_net "Net-(ICSP1-Pad4)") + (add_net "Net-(U1-Pad1)") + (add_net "Net-(U1-Pad14)") + (add_net "Net-(U1-Pad15)") + (add_net "Net-(U1-Pad16)") + (add_net "Net-(U1-Pad17)") + (add_net "Net-(U1-Pad18)") + (add_net "Net-(U1-Pad19)") + (add_net "Net-(U1-Pad2)") + (add_net "Net-(U1-Pad20)") + (add_net "Net-(U1-Pad21)") + (add_net "Net-(U1-Pad22)") + (add_net "Net-(U1-Pad23)") + (add_net "Net-(U1-Pad24)") + (add_net "Net-(U1-Pad25)") + (add_net "Net-(U1-Pad26)") + (add_net "Net-(U1-Pad27)") + (add_net "Net-(U1-Pad28)") + (add_net "Net-(U1-Pad29)") + (add_net "Net-(U1-Pad3)") + (add_net "Net-(U1-Pad33)") + (add_net "Net-(U1-Pad34)") + (add_net "Net-(U1-Pad35)") + (add_net "Net-(U1-Pad36)") + (add_net "Net-(U1-Pad37)") + (add_net "Net-(U1-Pad38)") + (add_net "Net-(U1-Pad39)") + (add_net "Net-(U1-Pad4)") + (add_net "Net-(U1-Pad40)") + (add_net "Net-(U1-Pad5)") + (add_net VCC) + ) + + (module Housings_DIP:DIP-28_W15.24mm_Socket (layer F.Cu) (tedit 59C78D6C) (tstamp 5A74F28E) + (at 127 88.9) + (descr "28-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket") + (tags "THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket") + (path /5A74D0F8) + (fp_text reference U2 (at 7.62 -2.33) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 28C256 (at 7.62 35.35) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_arc (start 7.62 -1.33) (end 6.62 -1.33) (angle -180) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.255 -1.27) (end 14.985 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 14.985 -1.27) (end 14.985 34.29) (layer F.Fab) (width 0.1)) + (fp_line (start 14.985 34.29) (end 0.255 34.29) (layer F.Fab) (width 0.1)) + (fp_line (start 0.255 34.29) (end 0.255 -0.27) (layer F.Fab) (width 0.1)) + (fp_line (start 0.255 -0.27) (end 1.255 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start -1.27 -1.33) (end -1.27 34.35) (layer F.Fab) (width 0.1)) + (fp_line (start -1.27 34.35) (end 16.51 34.35) (layer F.Fab) (width 0.1)) + (fp_line (start 16.51 34.35) (end 16.51 -1.33) (layer F.Fab) (width 0.1)) + (fp_line (start 16.51 -1.33) (end -1.27 -1.33) (layer F.Fab) (width 0.1)) + (fp_line (start 6.62 -1.33) (end 1.16 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 -1.33) (end 1.16 34.35) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 34.35) (end 14.08 34.35) (layer F.SilkS) (width 0.12)) + (fp_line (start 14.08 34.35) (end 14.08 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 14.08 -1.33) (end 8.62 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 -1.39) (end -1.33 34.41) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 34.41) (end 16.57 34.41) (layer F.SilkS) (width 0.12)) + (fp_line (start 16.57 34.41) (end 16.57 -1.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 16.57 -1.39) (end -1.33 -1.39) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.55 -1.6) (end -1.55 34.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.55 34.65) (end 16.8 34.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 16.8 34.65) (end 16.8 -1.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start 16.8 -1.6) (end -1.55 -1.6) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 7.62 16.51) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 4 "Net-(ICSP1-Pad1)")) + (pad 15 thru_hole oval (at 15.24 33.02) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 30 "Net-(U1-Pad37)")) + (pad 2 thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 16 "Net-(U1-Pad5)")) + (pad 16 thru_hole oval (at 15.24 30.48) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 28 "Net-(U1-Pad36)")) + (pad 3 thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 21 "Net-(U1-Pad29)")) + (pad 17 thru_hole oval (at 15.24 27.94) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 26 "Net-(U1-Pad35)")) + (pad 4 thru_hole oval (at 0 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 20 "Net-(U1-Pad28)")) + (pad 18 thru_hole oval (at 15.24 25.4) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 24 "Net-(U1-Pad34)")) + (pad 5 thru_hole oval (at 0 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 19 "Net-(U1-Pad27)")) + (pad 19 thru_hole oval (at 15.24 22.86) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 22 "Net-(U1-Pad33)")) + (pad 6 thru_hole oval (at 0 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 18 "Net-(U1-Pad26)")) + (pad 20 thru_hole oval (at 15.24 20.32) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 27 "Net-(U1-Pad16)")) + (pad 7 thru_hole oval (at 0 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 17 "Net-(U1-Pad25)")) + (pad 21 thru_hole oval (at 15.24 17.78) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 12 "Net-(U1-Pad3)")) + (pad 8 thru_hole oval (at 0 17.78) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 15 "Net-(U1-Pad24)")) + (pad 22 thru_hole oval (at 15.24 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 29 "Net-(U1-Pad17)")) + (pad 9 thru_hole oval (at 0 20.32) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 13 "Net-(U1-Pad23)")) + (pad 23 thru_hole oval (at 15.24 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 14 "Net-(U1-Pad4)")) + (pad 10 thru_hole oval (at 0 22.86) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 11 "Net-(U1-Pad22)")) + (pad 24 thru_hole oval (at 15.24 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 10 "Net-(U1-Pad2)")) + (pad 11 thru_hole oval (at 0 25.4) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 36 "Net-(U1-Pad40)")) + (pad 25 thru_hole oval (at 15.24 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 8 "Net-(U1-Pad1)")) + (pad 12 thru_hole oval (at 0 27.94) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 34 "Net-(U1-Pad39)")) + (pad 26 thru_hole oval (at 15.24 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 7 "Net-(ICSP1-Pad4)")) + (pad 13 thru_hole oval (at 0 30.48) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 32 "Net-(U1-Pad38)")) + (pad 27 thru_hole oval (at 15.24 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 31 "Net-(U1-Pad18)")) + (pad 14 thru_hole oval (at 0 33.02) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 GND)) + (pad 28 thru_hole oval (at 15.24 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 5 VCC)) + (model ${KISYS3DMOD}/Housings_DIP.3dshapes/DIP-28_W15.24mm_Socket.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5A74F21E) + (at 73.66 119.38 180) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /5A74E959) + (fp_text reference C1 (at 1.25 -2.31 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 22pF (at 1.25 2.31 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.31 -1.06) (end 2.81 -1.06) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.31 1.06) (end 2.81 1.06) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.31 -1.06) (end -0.31 -0.996) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.31 0.996) (end -0.31 1.06) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.81 -1.06) (end 2.81 -0.996) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.81 0.996) (end 2.81 1.06) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.05 -1.35) (end -1.05 1.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.35) (end 3.55 1.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.35) (end 3.55 -1.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 -1.35) (end -1.05 -1.35) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 1.25 0 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 "Net-(C1-Pad1)")) + (pad 2 thru_hole circle (at 2.5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 GND)) + (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer F.Cu) (tedit 5A74F311) (tstamp 5A74F224) + (at 73.66 114.3 180) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /5A74E91C) + (fp_text reference C2 (at 2.54 0 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 22pF (at 1.25 2.31 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.31 -1.06) (end 2.81 -1.06) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.31 1.06) (end 2.81 1.06) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.31 -1.06) (end -0.31 -0.996) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.31 0.996) (end -0.31 1.06) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.81 -1.06) (end 2.81 -0.996) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.81 0.996) (end 2.81 1.06) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.05 -1.35) (end -1.05 1.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.35) (end 3.55 1.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.35) (end 3.55 -1.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 -1.35) (end -1.05 -1.35) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 1.25 0 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 3 "Net-(C2-Pad1)")) + (pad 2 thru_hole circle (at 2.5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 GND)) + (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Pin_Headers:Pin_Header_Straight_2x03_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5A74F22E) + (at 81.28 78.74 270) + (descr "Through hole straight pin header, 2x03, 2.54mm pitch, double rows") + (tags "Through hole pin header THT 2x03 2.54mm double row") + (path /5A75183A) + (fp_text reference ICSP1 (at 1.27 -2.33 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value Conn_02x03_Odd_Even (at 1.27 7.41 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 0 -1.27) (end 3.81 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 3.81 -1.27) (end 3.81 6.35) (layer F.Fab) (width 0.1)) + (fp_line (start 3.81 6.35) (end -1.27 6.35) (layer F.Fab) (width 0.1)) + (fp_line (start -1.27 6.35) (end -1.27 0) (layer F.Fab) (width 0.1)) + (fp_line (start -1.27 0) (end 0 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start -1.33 6.41) (end 3.87 6.41) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 1.27) (end -1.33 6.41) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.87 -1.33) (end 3.87 6.41) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.27 1.27) (end 1.27 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.27 -1.33) (end 3.87 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.8 -1.8) (end -1.8 6.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.8 6.85) (end 4.35 6.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start 4.35 6.85) (end 4.35 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 4.35 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 1.27 2.54 360) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 4 "Net-(ICSP1-Pad1)")) + (pad 2 thru_hole oval (at 2.54 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 5 VCC)) + (pad 3 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 6 "Net-(ICSP1-Pad3)")) + (pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 7 "Net-(ICSP1-Pad4)")) + (pad 5 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 37 "Net-(C3-Pad1)")) + (pad 6 thru_hole oval (at 2.54 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 2 GND)) + (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_2x03_Pitch2.54mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Crystals:Crystal_HC49-U_Vertical (layer F.Cu) (tedit 58CD2E9C) (tstamp 5A74F234) + (at 81.28 114.3 270) + (descr "Crystal THT HC-49/U http://5hertz.com/pdfs/04404_D.pdf") + (tags "THT crystalHC-49/U") + (path /5A74E8D7) + (fp_text reference Q1 (at 2.44 -3.525 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 16MHz (at 2.44 3.525 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 2.44 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.685 -2.325) (end 5.565 -2.325) (layer F.Fab) (width 0.1)) + (fp_line (start -0.685 2.325) (end 5.565 2.325) (layer F.Fab) (width 0.1)) + (fp_line (start -0.56 -2) (end 5.44 -2) (layer F.Fab) (width 0.1)) + (fp_line (start -0.56 2) (end 5.44 2) (layer F.Fab) (width 0.1)) + (fp_line (start -0.685 -2.525) (end 5.565 -2.525) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.685 2.525) (end 5.565 2.525) (layer F.SilkS) (width 0.12)) + (fp_line (start -3.5 -2.8) (end -3.5 2.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.5 2.8) (end 8.4 2.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.4 2.8) (end 8.4 -2.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.4 -2.8) (end -3.5 -2.8) (layer F.CrtYd) (width 0.05)) + (fp_arc (start -0.685 0) (end -0.685 -2.325) (angle -180) (layer F.Fab) (width 0.1)) + (fp_arc (start 5.565 0) (end 5.565 -2.325) (angle 180) (layer F.Fab) (width 0.1)) + (fp_arc (start -0.56 0) (end -0.56 -2) (angle -180) (layer F.Fab) (width 0.1)) + (fp_arc (start 5.44 0) (end 5.44 -2) (angle 180) (layer F.Fab) (width 0.1)) + (fp_arc (start -0.685 0) (end -0.685 -2.525) (angle -180) (layer F.SilkS) (width 0.12)) + (fp_arc (start 5.565 0) (end 5.565 -2.525) (angle 180) (layer F.SilkS) (width 0.12)) + (pad 1 thru_hole circle (at 0 0 270) (size 1.5 1.5) (drill 0.8) (layers *.Cu *.Mask) + (net 3 "Net-(C2-Pad1)")) + (pad 2 thru_hole circle (at 4.88 0 270) (size 1.5 1.5) (drill 0.8) (layers *.Cu *.Mask) + (net 1 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Crystals.3dshapes/Crystal_HC49-U_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.393701 0.393701 0.393701)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 5874F706) (tstamp 5A74F23A) + (at 83.82 99.06 180) + (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm") + (path /5A74E368) + (fp_text reference R1 (at 5.08 -2.31 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 10k (at 5.08 2.31 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 1.93 1.25) (end 8.23 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 8.23 1.25) (end 8.23 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 8.23 -1.25) (end 1.93 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 1.93 0) (layer F.Fab) (width 0.1)) + (fp_line (start 10.16 0) (end 8.23 0) (layer F.Fab) (width 0.1)) + (fp_line (start 1.87 -1.31) (end 1.87 1.31) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.87 1.31) (end 8.29 1.31) (layer F.SilkS) (width 0.12)) + (fp_line (start 8.29 1.31) (end 8.29 -1.31) (layer F.SilkS) (width 0.12)) + (fp_line (start 8.29 -1.31) (end 1.87 -1.31) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.98 0) (end 1.87 0) (layer F.SilkS) (width 0.12)) + (fp_line (start 9.18 0) (end 8.29 0) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.6) (end 11.25 1.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start 11.25 1.6) (end 11.25 -1.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start 11.25 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05)) + (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 5 VCC)) + (pad 2 thru_hole oval (at 10.16 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 37 "Net-(C3-Pad1)")) + (model ${KISYS3DMOD}/Resistors_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.393701 0.393701 0.393701)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Buttons_Switches_THT:SW_PUSH_6mm_h4.3mm (layer F.Cu) (tedit 5923F252) (tstamp 5A74F242) + (at 76.2 88.9) + (descr "tactile push button, 6x6mm e.g. PHAP33xx series, height=4.3mm") + (tags "tact sw push 6mm") + (path /5A74EDF7) + (fp_text reference SW_RESET1 (at 3.25 -2) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value SW_Push (at 3.75 6.7) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.25 2.25) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 3.25 -0.75) (end 6.25 -0.75) (layer F.Fab) (width 0.1)) + (fp_line (start 6.25 -0.75) (end 6.25 5.25) (layer F.Fab) (width 0.1)) + (fp_line (start 6.25 5.25) (end 0.25 5.25) (layer F.Fab) (width 0.1)) + (fp_line (start 0.25 5.25) (end 0.25 -0.75) (layer F.Fab) (width 0.1)) + (fp_line (start 0.25 -0.75) (end 3.25 -0.75) (layer F.Fab) (width 0.1)) + (fp_line (start 7.75 6) (end 8 6) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8 6) (end 8 5.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.75 -1.5) (end 8 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8 -1.5) (end 8 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.5 -1.25) (end -1.5 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.5 -1.5) (end -1.25 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.5 5.75) (end -1.5 6) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.5 6) (end -1.25 6) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.25 -1.5) (end 7.75 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.5 5.75) (end -1.5 -1.25) (layer F.CrtYd) (width 0.05)) + (fp_line (start 7.75 6) (end -1.25 6) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8 -1.25) (end 8 5.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1 5.5) (end 5.5 5.5) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.25 1.5) (end -0.25 3) (layer F.SilkS) (width 0.12)) + (fp_line (start 5.5 -1) (end 1 -1) (layer F.SilkS) (width 0.12)) + (fp_line (start 6.75 3) (end 6.75 1.5) (layer F.SilkS) (width 0.12)) + (fp_circle (center 3.25 2.25) (end 1.25 2.5) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 0 4.5 90) (size 2 2) (drill 1.1) (layers *.Cu *.Mask) + (net 37 "Net-(C3-Pad1)")) + (pad 1 thru_hole circle (at 0 0 90) (size 2 2) (drill 1.1) (layers *.Cu *.Mask) + (net 2 GND)) + (pad 2 thru_hole circle (at 6.5 4.5 90) (size 2 2) (drill 1.1) (layers *.Cu *.Mask) + (net 37 "Net-(C3-Pad1)")) + (pad 1 thru_hole circle (at 6.5 0 90) (size 2 2) (drill 1.1) (layers *.Cu *.Mask) + (net 2 GND)) + (model ${KISYS3DMOD}/Buttons_Switches_THT.3dshapes/SW_PUSH_6mm_h4.3mm.wrl + (at (xyz 0.005 0 0)) + (scale (xyz 0.3937 0.3937 0.3937)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Housings_DIP:DIP-40_W15.24mm_Socket (layer F.Cu) (tedit 59C78D6C) (tstamp 5A74F26E) + (at 91.44 81.28) + (descr "40-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket") + (tags "THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket") + (path /5A74CEE7) + (fp_text reference U1 (at 7.62 -2.33) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value ATMEGA16-16PU (at 7.62 50.59) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_arc (start 7.62 -1.33) (end 6.62 -1.33) (angle -180) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.255 -1.27) (end 14.985 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 14.985 -1.27) (end 14.985 49.53) (layer F.Fab) (width 0.1)) + (fp_line (start 14.985 49.53) (end 0.255 49.53) (layer F.Fab) (width 0.1)) + (fp_line (start 0.255 49.53) (end 0.255 -0.27) (layer F.Fab) (width 0.1)) + (fp_line (start 0.255 -0.27) (end 1.255 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start -1.27 -1.33) (end -1.27 49.59) (layer F.Fab) (width 0.1)) + (fp_line (start -1.27 49.59) (end 16.51 49.59) (layer F.Fab) (width 0.1)) + (fp_line (start 16.51 49.59) (end 16.51 -1.33) (layer F.Fab) (width 0.1)) + (fp_line (start 16.51 -1.33) (end -1.27 -1.33) (layer F.Fab) (width 0.1)) + (fp_line (start 6.62 -1.33) (end 1.16 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 -1.33) (end 1.16 49.59) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 49.59) (end 14.08 49.59) (layer F.SilkS) (width 0.12)) + (fp_line (start 14.08 49.59) (end 14.08 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 14.08 -1.33) (end 8.62 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 -1.39) (end -1.33 49.65) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 49.65) (end 16.57 49.65) (layer F.SilkS) (width 0.12)) + (fp_line (start 16.57 49.65) (end 16.57 -1.39) (layer F.SilkS) (width 0.12)) + (fp_line (start 16.57 -1.39) (end -1.33 -1.39) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.55 -1.6) (end -1.55 49.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.55 49.85) (end 16.8 49.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start 16.8 49.85) (end 16.8 -1.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start 16.8 -1.6) (end -1.55 -1.6) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 7.62 24.13) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 8 "Net-(U1-Pad1)")) + (pad 21 thru_hole oval (at 15.24 48.26) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 9 "Net-(U1-Pad21)")) + (pad 2 thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 10 "Net-(U1-Pad2)")) + (pad 22 thru_hole oval (at 15.24 45.72) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 11 "Net-(U1-Pad22)")) + (pad 3 thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 12 "Net-(U1-Pad3)")) + (pad 23 thru_hole oval (at 15.24 43.18) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 13 "Net-(U1-Pad23)")) + (pad 4 thru_hole oval (at 0 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 14 "Net-(U1-Pad4)")) + (pad 24 thru_hole oval (at 15.24 40.64) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 15 "Net-(U1-Pad24)")) + (pad 5 thru_hole oval (at 0 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 16 "Net-(U1-Pad5)")) + (pad 25 thru_hole oval (at 15.24 38.1) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 17 "Net-(U1-Pad25)")) + (pad 6 thru_hole oval (at 0 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 7 "Net-(ICSP1-Pad4)")) + (pad 26 thru_hole oval (at 15.24 35.56) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 18 "Net-(U1-Pad26)")) + (pad 7 thru_hole oval (at 0 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 4 "Net-(ICSP1-Pad1)")) + (pad 27 thru_hole oval (at 15.24 33.02) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 19 "Net-(U1-Pad27)")) + (pad 8 thru_hole oval (at 0 17.78) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 6 "Net-(ICSP1-Pad3)")) + (pad 28 thru_hole oval (at 15.24 30.48) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 20 "Net-(U1-Pad28)")) + (pad 9 thru_hole oval (at 0 20.32) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 37 "Net-(C3-Pad1)")) + (pad 29 thru_hole oval (at 15.24 27.94) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 21 "Net-(U1-Pad29)")) + (pad 10 thru_hole oval (at 0 22.86) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 5 VCC)) + (pad 30 thru_hole oval (at 15.24 25.4) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 5 VCC)) + (pad 11 thru_hole oval (at 0 25.4) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 GND)) + (pad 31 thru_hole oval (at 15.24 22.86) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 GND)) + (pad 12 thru_hole oval (at 0 27.94) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 3 "Net-(C2-Pad1)")) + (pad 32 thru_hole oval (at 15.24 20.32) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 GND)) + (pad 13 thru_hole oval (at 0 30.48) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 "Net-(C1-Pad1)")) + (pad 33 thru_hole oval (at 15.24 17.78) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 22 "Net-(U1-Pad33)")) + (pad 14 thru_hole oval (at 0 33.02) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 23 "Net-(U1-Pad14)")) + (pad 34 thru_hole oval (at 15.24 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 24 "Net-(U1-Pad34)")) + (pad 15 thru_hole oval (at 0 35.56) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 25 "Net-(U1-Pad15)")) + (pad 35 thru_hole oval (at 15.24 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 26 "Net-(U1-Pad35)")) + (pad 16 thru_hole oval (at 0 38.1) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 27 "Net-(U1-Pad16)")) + (pad 36 thru_hole oval (at 15.24 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 28 "Net-(U1-Pad36)")) + (pad 17 thru_hole oval (at 0 40.64) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 29 "Net-(U1-Pad17)")) + (pad 37 thru_hole oval (at 15.24 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 30 "Net-(U1-Pad37)")) + (pad 18 thru_hole oval (at 0 43.18) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 31 "Net-(U1-Pad18)")) + (pad 38 thru_hole oval (at 15.24 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 32 "Net-(U1-Pad38)")) + (pad 19 thru_hole oval (at 0 45.72) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 33 "Net-(U1-Pad19)")) + (pad 39 thru_hole oval (at 15.24 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 34 "Net-(U1-Pad39)")) + (pad 20 thru_hole oval (at 0 48.26) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 35 "Net-(U1-Pad20)")) + (pad 40 thru_hole oval (at 15.24 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 36 "Net-(U1-Pad40)")) + (model ${KISYS3DMOD}/Housings_DIP.3dshapes/DIP-40_W15.24mm_Socket.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Pin_Headers:Pin_Header_Straight_1x04_Pitch2.54mm (layer F.Cu) (tedit 5A750DAC) (tstamp 5A74F296) + (at 73.66 129.54 90) + (descr "Through hole straight pin header, 1x04, 2.54mm pitch, single row") + (tags "Through hole pin header THT 1x04 2.54mm single row") + (path /5A74DDB8) + (fp_text reference UART1 (at 0 -2.33 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value Conn_01x04 (at 0 9.95 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 1.27 -1.27) (end 1.27 8.89) (layer F.Fab) (width 0.1)) + (fp_line (start 1.27 8.89) (end -1.27 8.89) (layer F.Fab) (width 0.1)) + (fp_line (start -1.27 8.89) (end -1.27 -0.635) (layer F.Fab) (width 0.1)) + (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start -1.33 8.95) (end 1.33 8.95) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 1.27) (end -1.33 8.95) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.33 1.27) (end 1.33 8.95) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.8 -1.8) (end -1.8 9.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.8 9.4) (end 1.8 9.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.8 9.4) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 3.81 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 2 GND)) + (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 5 VCC)) + (pad 3 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 25 "Net-(U1-Pad15)")) + (pad 4 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 23 "Net-(U1-Pad14)")) + (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x04_Pitch2.54mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5A74F8BF) + (at 73.66 104.14 270) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /5A75701A) + (fp_text reference C3 (at 1.25 -2.31 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 47nF (at 1.25 2.31 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.31 -1.06) (end 2.81 -1.06) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.31 1.06) (end 2.81 1.06) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.31 -1.06) (end -0.31 -0.996) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.31 0.996) (end -0.31 1.06) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.81 -1.06) (end 2.81 -0.996) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.81 0.996) (end 2.81 1.06) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.05 -1.35) (end -1.05 1.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.35) (end 3.55 1.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.35) (end 3.55 -1.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 -1.35) (end -1.05 -1.35) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 1.25 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 37 "Net-(C3-Pad1)")) + (pad 2 thru_hole circle (at 2.5 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 GND)) + (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm (layer F.Cu) (tedit 597BC7C2) (tstamp 5A74F8C5) + (at 83.82 104.14 270) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor") + (path /5A756F33) + (fp_text reference C4 (at 1.25 -2.31 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100nF (at 1.25 2.31 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.25 -1) (end -0.25 1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.25 1) (end 2.75 1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1) (end 2.75 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 -1) (end -0.25 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.31 -1.06) (end 2.81 -1.06) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.31 1.06) (end 2.81 1.06) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.31 -1.06) (end -0.31 -0.996) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.31 0.996) (end -0.31 1.06) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.81 -1.06) (end 2.81 -0.996) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.81 0.996) (end 2.81 1.06) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.05 -1.35) (end -1.05 1.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.35) (end 3.55 1.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.35) (end 3.55 -1.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 -1.35) (end -1.05 -1.35) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 1.25 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 5 VCC)) + (pad 2 thru_hole circle (at 2.5 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 GND)) + (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D3.0mm_W2.0mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (gr_line (start 66.04 73.66) (end 66.04 134.62) (angle 90) (layer Edge.Cuts) (width 0.15)) + (gr_line (start 71.12 73.66) (end 66.04 73.66) (angle 90) (layer Edge.Cuts) (width 0.15)) + (gr_line (start 147.32 73.66) (end 71.12 73.66) (angle 90) (layer Edge.Cuts) (width 0.15)) + (gr_line (start 147.32 134.62) (end 147.32 73.66) (angle 90) (layer Edge.Cuts) (width 0.15)) + (gr_line (start 66.04 134.62) (end 147.32 134.62) (angle 90) (layer Edge.Cuts) (width 0.15)) + + (segment (start 81.28 119.18) (end 84.02 119.18) (width 0.25) (layer B.Cu) (net 1) (status 10)) + (segment (start 84.02 119.18) (end 91.44 111.76) (width 0.25) (layer B.Cu) (net 1) (tstamp 5A751197) (status 20)) + (segment (start 73.66 119.38) (end 81.28 119.38) (width 0.25) (layer B.Cu) (net 1) (status 10)) + (segment (start 81.28 119.38) (end 81.28 119.18) (width 0.25) (layer B.Cu) (net 1) (tstamp 5A751196) (status 30)) + (segment (start 106.68 104.14) (end 100.33 104.14) (width 0.25) (layer B.Cu) (net 2)) + (segment (start 97.79 106.68) (end 91.44 106.68) (width 0.25) (layer B.Cu) (net 2) (tstamp 5A753754)) + (segment (start 100.33 104.14) (end 97.79 106.68) (width 0.25) (layer B.Cu) (net 2) (tstamp 5A753753)) + (segment (start 106.68 104.14) (end 107.95 105.41) (width 0.25) (layer B.Cu) (net 2)) + (segment (start 123.19 121.92) (end 127 121.92) (width 0.25) (layer B.Cu) (net 2) (tstamp 5A752E0C)) + (segment (start 109.22 107.95) (end 123.19 121.92) (width 0.25) (layer B.Cu) (net 2) (tstamp 5A752E0A)) + (segment (start 109.22 106.68) (end 109.22 107.95) (width 0.25) (layer B.Cu) (net 2) (tstamp 5A752E05)) + (segment (start 107.95 105.41) (end 109.22 106.68) (width 0.25) (layer B.Cu) (net 2) (tstamp 5A752DFE)) + (segment (start 106.68 101.6) (end 106.68 104.14) (width 0.25) (layer B.Cu) (net 2)) + (segment (start 76.2 88.9) (end 82.7 88.9) (width 0.25) (layer B.Cu) (net 2)) + (segment (start 76.2 81.28) (end 76.2 88.9) (width 0.25) (layer B.Cu) (net 2)) + (segment (start 73.66 106.64) (end 73.62 106.64) (width 0.25) (layer B.Cu) (net 2)) + (segment (start 73.62 106.64) (end 71.12 104.14) (width 0.25) (layer B.Cu) (net 2) (tstamp 5A751934)) + (segment (start 71.12 86.36) (end 76.2 81.28) (width 0.25) (layer B.Cu) (net 2) (tstamp 5A75193A)) + (segment (start 71.12 104.14) (end 71.12 86.36) (width 0.25) (layer B.Cu) (net 2) (tstamp 5A751935)) + (segment (start 71.16 119.38) (end 71.16 127.04) (width 0.25) (layer B.Cu) (net 2)) + (segment (start 71.16 127.04) (end 73.66 129.54) (width 0.25) (layer B.Cu) (net 2) (tstamp 5A751329) (status 20)) + (segment (start 71.16 114.3) (end 71.16 119.38) (width 0.25) (layer B.Cu) (net 2) (status 20)) + (segment (start 73.66 106.64) (end 73.66 106.68) (width 0.25) (layer B.Cu) (net 2) (status 30)) + (segment (start 73.66 106.68) (end 71.16 109.18) (width 0.25) (layer B.Cu) (net 2) (tstamp 5A751180) (status 10)) + (segment (start 71.16 109.18) (end 71.16 114.3) (width 0.25) (layer B.Cu) (net 2) (tstamp 5A751182) (status 20)) + (segment (start 91.44 106.68) (end 83.86 106.68) (width 0.25) (layer B.Cu) (net 2) (status 10)) + (segment (start 83.86 106.68) (end 83.82 106.64) (width 0.25) (layer B.Cu) (net 2) (tstamp 5A7510F1) (status 30)) + (segment (start 83.82 106.64) (end 73.66 106.64) (width 0.25) (layer B.Cu) (net 2) (tstamp 5A7510F2) (status 20)) + (segment (start 81.28 114.3) (end 86.36 114.3) (width 0.25) (layer B.Cu) (net 3) (status 10)) + (segment (start 86.36 114.3) (end 91.44 109.22) (width 0.25) (layer B.Cu) (net 3) (tstamp 5A75119C) (status 20)) + (segment (start 73.66 114.3) (end 81.28 114.3) (width 0.25) (layer B.Cu) (net 3) (status 10)) + (segment (start 91.44 96.52) (end 92.71 96.52) (width 0.25) (layer F.Cu) (net 4)) + (segment (start 125.73 87.63) (end 127 88.9) (width 0.25) (layer F.Cu) (net 4) (tstamp 5A753634)) + (segment (start 118.11 87.63) (end 125.73 87.63) (width 0.25) (layer F.Cu) (net 4) (tstamp 5A75362F)) + (segment (start 116.84 86.36) (end 118.11 87.63) (width 0.25) (layer F.Cu) (net 4) (tstamp 5A75362E)) + (segment (start 109.22 78.74) (end 116.84 86.36) (width 0.25) (layer F.Cu) (net 4) (tstamp 5A75362B)) + (segment (start 105.41 78.74) (end 109.22 78.74) (width 0.25) (layer F.Cu) (net 4) (tstamp 5A75361F)) + (segment (start 102.87 81.28) (end 105.41 78.74) (width 0.25) (layer F.Cu) (net 4) (tstamp 5A75361D)) + (segment (start 102.87 86.36) (end 102.87 81.28) (width 0.25) (layer F.Cu) (net 4) (tstamp 5A753612)) + (segment (start 92.71 96.52) (end 102.87 86.36) (width 0.25) (layer F.Cu) (net 4) (tstamp 5A75360C)) + (segment (start 81.28 78.74) (end 83.82 78.74) (width 0.25) (layer F.Cu) (net 4)) + (segment (start 86.36 91.44) (end 91.44 96.52) (width 0.25) (layer B.Cu) (net 4) (tstamp 5A751B4C)) + (via (at 86.36 91.44) (size 0.6) (drill 0.4) (layers F.Cu B.Cu) (net 4)) + (segment (start 86.36 81.28) (end 86.36 91.44) (width 0.25) (layer F.Cu) (net 4) (tstamp 5A751B45)) + (segment (start 83.82 78.74) (end 86.36 81.28) (width 0.25) (layer F.Cu) (net 4) (tstamp 5A751B43)) + (segment (start 91.44 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5A752D35)) + (segment (start 107.95 83.82) (end 110.49 86.36) (width 0.25) (layer F.Cu) (net 34) (tstamp 5A752D33)) + (segment (start 127 114.3) (end 123.19 114.3) (width 0.25) (layer B.Cu) (net 36)) + (segment (start 107.95 81.28) (end 106.68 81.28) (width 0.25) (layer F.Cu) (net 36) (tstamp 5A752D2D)) + (segment (start 111.76 85.09) (end 107.95 81.28) (width 0.25) (layer F.Cu) (net 36) (tstamp 5A752D2A)) + (segment (start 111.76 87.63) (end 111.76 85.09) (width 0.25) (layer F.Cu) (net 36) (tstamp 5A752D29)) + (segment (start 111.76 101.6) (end 111.76 87.63) (width 0.25) (layer F.Cu) (net 36) (tstamp 5A752D28)) + (via (at 111.76 101.6) (size 0.6) (drill 0.4) (layers F.Cu B.Cu) (net 36)) + (segment (start 111.76 102.87) (end 111.76 101.6) (width 0.25) (layer B.Cu) (net 36) (tstamp 5A752D25)) + (segment (start 123.19 114.3) (end 111.76 102.87) (width 0.25) (layer B.Cu) (net 36) (tstamp 5A752D1A)) + (segment (start 76.2 93.4) (end 82.7 93.4) (width 0.25) (layer B.Cu) (net 37)) + (segment (start 76.2 93.4) (end 73.66 93.4) (width 0.25) (layer F.Cu) (net 37)) + (segment (start 73.66 93.4) (end 73.66 93.98) (width 0.25) (layer F.Cu) (net 37) (tstamp 5A751964)) + (segment (start 76.2 78.74) (end 73.66 81.28) (width 0.25) (layer F.Cu) (net 37)) + (segment (start 73.66 81.28) (end 73.66 93.98) (width 0.25) (layer F.Cu) (net 37) (tstamp 5A751957)) + (segment (start 73.66 93.98) (end 73.66 99.06) (width 0.25) (layer F.Cu) (net 37) (tstamp 5A751968)) + (segment (start 73.66 101.6) (end 73.66 99.06) (width 0.25) (layer B.Cu) (net 37)) + (segment (start 91.44 101.6) (end 73.66 101.6) (width 0.25) (layer B.Cu) (net 37) (status 10)) + (segment (start 73.66 101.6) (end 73.66 104.14) (width 0.25) (layer B.Cu) (net 37) (tstamp 5A751342)) + +) diff --git a/kicad/eepprog.net b/kicad/eepprog.net new file mode 100644 index 0000000..c5c2b61 --- /dev/null +++ b/kicad/eepprog.net @@ -0,0 +1,388 @@ +(export (version D) + (design + (source /home/lexi/Projects/Z80_Computer/avr/eeprom_programmer/kicad_atm16/eepprog.sch) + (date "2018-02-03T00:47:37 CET") + (tool "Eeschema 4.0.7") + (sheet (number 1) (name /) (tstamps /) + (title_block + (title) + (company) + (rev) + (date) + (source eepprog.sch) + (comment (number 1) (value "")) + (comment (number 2) (value "")) + (comment (number 3) (value "")) + (comment (number 4) (value ""))))) + (components + (comp (ref U1) + (value ATMEGA16-16PU) + (footprint Housings_DIP:DIP-40_W15.24mm_Socket) + (libsource (lib atmel) (part ATMEGA16-16PU)) + (sheetpath (names /) (tstamps /)) + (tstamp 5A74CEE7)) + (comp (ref U2) + (value 28C256) + (footprint Housings_DIP:DIP-28_W15.24mm_Socket) + (libsource (lib memory) (part 28C256)) + (sheetpath (names /) (tstamps /)) + (tstamp 5A74D0F8)) + (comp (ref UART1) + (value Conn_01x04) + (footprint Pin_Headers:Pin_Header_Straight_1x04_Pitch2.54mm) + (libsource (lib conn) (part Conn_01x04)) + (sheetpath (names /) (tstamps /)) + (tstamp 5A74DDB8)) + (comp (ref R1) + (value 10k) + (footprint Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 5A74E368)) + (comp (ref Q1) + (value 16MHz) + (footprint Crystals:Crystal_HC49-U_Vertical) + (libsource (lib device) (part Crystal)) + (sheetpath (names /) (tstamps /)) + (tstamp 5A74E8D7)) + (comp (ref C2) + (value 22pF) + (footprint Capacitors_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 5A74E91C)) + (comp (ref C1) + (value 22pF) + (footprint Capacitors_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 5A74E959)) + (comp (ref SW_RESET1) + (value SW_Push) + (footprint Buttons_Switches_THT:SW_PUSH_6mm_h4.3mm) + (libsource (lib switches) (part SW_Push)) + (sheetpath (names /) (tstamps /)) + (tstamp 5A74EDF7)) + (comp (ref ICSP1) + (value Conn_02x03_Odd_Even) + (footprint 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(pin (num 18) (name "(OC1B)PD4") (type BiDi)) + (pin (num 19) (name "(OC1A)PD5") (type BiDi)) + (pin (num 20) (name "(ICP)PD6") (type BiDi)) + (pin (num 21) (name "(OC2)PD7") (type BiDi)) + (pin (num 22) (name "(SCL)PC0") (type BiDi)) + (pin (num 23) (name "(SDA)PC1") (type BiDi)) + (pin (num 24) (name "(TCK)PC2") (type BiDi)) + (pin (num 25) (name "(TMS)PC3") (type BiDi)) + (pin (num 26) (name "(TDO)PC4") (type BiDi)) + (pin (num 27) (name "(TDI)PC5") (type BiDi)) + (pin (num 28) (name "(TOSC1)PC6") (type BiDi)) + (pin (num 29) (name "(TOSC2)PC7") (type BiDi)) + (pin (num 30) (name AVCC) (type power_in)) + (pin (num 31) (name AGND) (type power_in)) + (pin (num 32) (name AREF) (type power_in)) + (pin (num 33) (name "(ADC7)PA7") (type BiDi)) + (pin (num 34) (name "(ADC6)PA6") (type BiDi)) + (pin (num 35) (name "(ADC5)PA5") (type BiDi)) + (pin (num 36) (name "(ADC4)PA4") (type BiDi)) + (pin (num 37) (name "(ADC3)PA3") (type BiDi)) + (pin (num 38) (name "(ADC2)PA2") (type BiDi)) + (pin (num 39) (name "(ADC1)PA1") (type BiDi)) + (pin (num 40) (name "(ADC0)PA0") (type BiDi)))) + (libpart (lib device) (part C) + (description "Unpolarized capacitor") + (footprints + (fp C_*)) + (fields + (field (name Reference) C) + (field (name Value) C)) + (pins + (pin (num 1) (name ~) (type passive)) + (pin (num 2) (name ~) (type passive)))) + (libpart (lib conn) (part Conn_01x04) + (description "Generic connector, single row, 01x04") + (docs ~) + (footprints + (fp Connector*:*_??x*mm*) + (fp Connector*:*1x??x*mm*) + (fp Pin?Header?Straight?1X*) + (fp Pin?Header?Angled?1X*) + (fp Socket?Strip?Straight?1X*) + (fp Socket?Strip?Angled?1X*)) + (fields + (field (name Reference) J) + (field (name Value) Conn_01x04)) + (pins + (pin (num 1) (name Pin_1) (type passive)) + (pin (num 2) (name Pin_2) (type passive)) + (pin (num 3) (name Pin_3) (type passive)) + (pin (num 4) (name Pin_4) (type passive)))) + (libpart (lib conn) (part Conn_02x03_Odd_Even) + (description "Generic connector, double row, 02x03, odd/even pin numbering scheme (row 1 odd numbers, row 2 even numbers)") + (docs ~) + (footprints + (fp Connector*:*2x??x*mm*) + (fp Connector*:*2x???Pitch*) + (fp Pin_Header_Straight_2X*) + (fp Pin_Header_Angled_2X*) + (fp Socket_Strip_Straight_2X*) + (fp Socket_Strip_Angled_2X*)) + (fields + (field (name Reference) J) + (field (name Value) Conn_02x03_Odd_Even)) + (pins + (pin (num 1) (name Pin_1) (type passive)) + (pin (num 2) (name Pin_2) (type passive)) + (pin (num 3) (name Pin_3) (type passive)) + (pin (num 4) (name Pin_4) (type passive)) + (pin (num 5) (name Pin_5) (type passive)) + (pin (num 6) (name Pin_6) (type passive)))) + (libpart (lib device) (part Crystal) + (description "Two pin crystal") + (footprints + (fp Crystal*)) + (fields + (field (name Reference) Y) + (field (name Value) Crystal)) + (pins + (pin (num 1) (name 1) (type passive)) + (pin (num 2) (name 2) (type passive)))) + (libpart (lib device) (part R) + (description Resistor) + (footprints + (fp R_*) + (fp R_*)) + (fields + (field (name Reference) R) + (field (name Value) R)) + (pins + (pin (num 1) (name ~) (type passive)) + (pin (num 2) (name ~) (type passive)))) + (libpart (lib switches) (part SW_Push) + (description "Push button switch, generic, two pins") + (fields + (field (name Reference) SW) + (field (name Value) SW_Push)) + (pins + (pin (num 1) (name 1) (type passive)) + (pin (num 2) (name 2) (type passive))))) + (libraries + (library (logical device) + (uri /usr/share/kicad/library/device.lib)) + (library (logical switches) + (uri /usr/share/kicad/library/switches.lib)) + (library (logical conn) + (uri /usr/share/kicad/library/conn.lib)) + (library (logical memory) + (uri /usr/share/kicad/library/memory.lib)) + (library (logical atmel) + (uri /usr/share/kicad/library/atmel.lib))) + (nets + (net (code 1) (name "Net-(C2-Pad1)") + (node (ref C2) (pin 1)) + (node (ref U1) (pin 12)) + (node (ref Q1) (pin 1))) + (net (code 2) (name "Net-(C1-Pad1)") + (node (ref C1) (pin 1)) + (node (ref Q1) (pin 2)) + (node (ref U1) (pin 13))) + (net (code 3) (name "Net-(U1-Pad14)") + (node (ref UART1) (pin 4)) + (node (ref U1) (pin 14))) + (net (code 4) (name "Net-(U1-Pad15)") + (node (ref UART1) (pin 3)) + (node (ref U1) (pin 15))) + (net (code 5) (name "Net-(U1-Pad35)") + (node (ref U2) (pin 17)) + (node (ref U1) (pin 35))) + (net (code 6) (name "Net-(U1-Pad36)") + (node (ref U2) (pin 16)) + (node (ref U1) (pin 36))) + (net (code 7) (name "Net-(U1-Pad37)") + (node (ref U1) (pin 37)) + (node (ref U2) (pin 15))) + (net (code 8) (name "Net-(U1-Pad38)") + (node (ref U2) (pin 13)) + (node (ref U1) (pin 38))) + (net (code 9) (name "Net-(U1-Pad39)") + (node (ref U1) (pin 39)) + (node (ref U2) (pin 12))) + (net (code 10) (name "Net-(U1-Pad40)") + (node (ref U2) (pin 11)) + (node (ref U1) (pin 40))) + (net (code 11) (name "Net-(U1-Pad16)") + (node (ref U2) (pin 20)) + (node (ref U1) (pin 16))) + (net (code 12) (name "Net-(U1-Pad17)") + (node (ref U2) (pin 22)) + (node (ref U1) (pin 17))) + (net (code 13) (name "Net-(U1-Pad18)") + (node (ref U1) (pin 18)) + (node (ref U2) (pin 27))) + (net (code 14) (name GND) + (node (ref ICSP1) (pin 6)) + (node (ref SW_RESET1) (pin 1)) + (node (ref C1) (pin 2)) + (node (ref C2) (pin 2)) + (node (ref U2) (pin 14)) + (node (ref UART1) (pin 1)) + (node (ref U1) (pin 31)) + (node (ref U1) (pin 32)) + (node (ref U1) (pin 11)) + (node (ref C3) (pin 2)) + (node (ref C4) (pin 2))) + (net (code 15) (name "Net-(C3-Pad1)") + (node (ref ICSP1) (pin 5)) + (node (ref C3) (pin 1)) + (node (ref SW_RESET1) (pin 2)) + (node (ref R1) (pin 2)) + (node (ref U1) (pin 9))) + (net (code 16) (name "Net-(U1-Pad19)") + (node (ref U1) (pin 19))) + (net (code 17) (name "Net-(U1-Pad20)") + (node (ref U1) (pin 20))) + (net (code 18) (name "Net-(U1-Pad21)") + (node (ref U1) (pin 21))) + (net (code 19) (name VCC) + (node (ref UART1) (pin 2)) + (node (ref U1) (pin 30)) + (node (ref R1) (pin 1)) + (node (ref U1) (pin 10)) + (node (ref C4) (pin 1)) + (node (ref ICSP1) (pin 2)) + (node (ref U2) (pin 28))) + (net (code 20) (name "Net-(ICSP1-Pad3)") + (node (ref ICSP1) (pin 3)) + (node (ref U1) (pin 8))) + (net (code 21) (name "Net-(U1-Pad29)") + (node (ref U2) (pin 3)) + (node (ref U1) (pin 29))) + (net (code 22) (name "Net-(ICSP1-Pad1)") + (node (ref U2) (pin 1)) + (node (ref U1) (pin 7)) + (node (ref ICSP1) (pin 1))) + (net (code 23) (name "Net-(U1-Pad5)") + (node (ref U1) (pin 5)) + (node (ref U2) (pin 2))) + (net (code 24) (name "Net-(U1-Pad28)") + (node (ref U1) (pin 28)) + (node (ref U2) (pin 4))) + (net (code 25) (name "Net-(U1-Pad27)") + (node (ref U2) (pin 5)) + (node (ref U1) (pin 27))) + (net (code 26) (name "Net-(U1-Pad3)") + (node (ref U2) (pin 21)) + (node (ref U1) (pin 3))) + (net (code 27) (name "Net-(U1-Pad2)") + (node (ref U2) (pin 24)) + (node (ref U1) (pin 2))) + (net (code 28) (name "Net-(U1-Pad4)") + (node (ref U1) (pin 4)) + (node (ref U2) (pin 23))) + (net (code 29) (name "Net-(ICSP1-Pad4)") + (node (ref U2) (pin 26)) + (node (ref ICSP1) (pin 4)) + (node (ref U1) (pin 6))) + (net (code 30) (name "Net-(U1-Pad22)") + (node (ref U2) (pin 10)) + (node (ref U1) (pin 22))) + (net (code 31) (name "Net-(U1-Pad23)") + (node (ref U2) (pin 9)) + (node (ref U1) (pin 23))) + (net (code 32) (name "Net-(U1-Pad33)") + (node (ref U1) (pin 33)) + (node (ref U2) (pin 19))) + (net (code 33) (name "Net-(U1-Pad24)") + (node (ref U1) (pin 24)) + (node (ref U2) (pin 8))) + (net (code 34) (name "Net-(U1-Pad25)") + (node (ref U2) (pin 7)) + (node (ref U1) (pin 25))) + (net (code 35) (name "Net-(U1-Pad26)") + (node (ref U2) (pin 6)) + (node (ref U1) (pin 26))) + (net (code 36) (name "Net-(U1-Pad1)") + (node (ref U1) (pin 1)) + (node (ref U2) (pin 25))) + (net (code 37) (name "Net-(U1-Pad34)") + (node (ref U1) (pin 34)) + (node (ref U2) (pin 18))))) \ No newline at end of file diff --git a/kicad/eepprog.pro b/kicad/eepprog.pro new file mode 100644 index 0000000..9a39f90 --- /dev/null +++ b/kicad/eepprog.pro @@ -0,0 +1,30 @@ +update=2018-08-08T20:51:05 CEST +version=1 +last_client=kicad +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[general] +version=1 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= diff --git a/kicad/eepprog.sch b/kicad/eepprog.sch new file mode 100644 index 0000000..2045f6a --- /dev/null +++ b/kicad/eepprog.sch @@ -0,0 +1,489 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:switches +LIBS:relays +LIBS:motors +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul 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CNN +F 1 "GND" H 6000 5900 50 0000 C CNN +F 2 "" H 6000 6050 50 0001 C CNN +F 3 "" H 6000 6050 50 0001 C CNN + 1 6000 6050 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6000 5850 6000 6050 +$Comp +L PWR_FLAG #FLG010 +U 1 1 5A7568D4 +P 1350 3350 +F 0 "#FLG010" H 1350 3425 50 0001 C CNN +F 1 "PWR_FLAG" H 1350 3500 50 0000 C CNN +F 2 "" H 1350 3350 50 0001 C CNN +F 3 "" H 1350 3350 50 0001 C CNN + 1 1350 3350 + 0 -1 -1 0 +$EndComp +$EndSCHEMATC diff --git a/pin_allocation.txt b/pin_allocation.txt new file mode 100644 index 0000000..cc97ecf --- /dev/null +++ b/pin_allocation.txt @@ -0,0 +1,85 @@ +Microcontroller: +- ATmega16 (32 IO-Pins) +- available IO pins: + - PA0-7 + - PB0-7 (including PB5-7 for ISP) + - PC0-7 + - PD2-7 (PD0 and PD1 are UART pins) + +EEPROM: +- Atmel AT28C256 +- IO and control pins: + - 8 data lines (I/O) D0-7 + - 15 address lines A0-14 + - inverted Chip Enable ~CE + - inverted Output Enable ~OE + - inverted Write Enable ~WE + +Usage +----- +- 1 microcontroller (µC), 1 EEPROM +- direct parallel data IO + +Pin allocation +-------------- +- on µC + - PC0-7 --> EEPROM address lines A0-7 + - PB0-6 --> EEPROM address lines A8-14 + - PA0-7 <-> EEPROM data lines D0-7 + - PD0-1 <-> UART TX/RX + - PD2 --> EEPROM ~CE + - PD3 --> EEPROM ~OE + - PD4 --> EEPROM ~WE + +- on EEPROM + (see µC) + + +Reading process +--------------- +1. reset EEPROM control bits to [chip disabled, output disabled, write disabled] + PORTD2..4 = 111 +2. set data pins as inputs (without pullups - maybe disable pullups at all (PUD in SFIOR)) + DDA0..7 = 00000000 + PORTA0..7 = 00000000 +3. set address + PORTC0..7 = [Address bits 0..7] + PORTB0..6 = [Address bits 0..6] +4. set EEPROM to read mode by enabling chip and output [chip enabled, output enabled, write disabled] + PORTD2..4 = 001 +5. wait ~150ns +6. read byte from data pins + DATABYTE0..7 = PINA0..7 +7. reset control bits + PORTD2..4 = 111 +8. to read next byte, continue at step 3. + + +Writing process +--------------- +1. reset EEPROM control bits (see reading) + PORTD2..4 = 111 +2. set data pins as outputs (and reset output pins) + DDA0..7 = 11111111 + PORTA0..7 = 00000000 +3. set address + PORTC0..7 = [Address bits 0..7] + PORTB0..6 = [Address bits 0..6] +4. set control bits to latch address (falling edge) + PORTD2..4 = 010 +5. set data output to the value to be written + PORTA0..7 = WRITEBYTE0..7 +6. wait 50ns (data setup time) +7. set control bits to latch data and start write cycle (rising edge) + PORTD2..4 = 111 +8. wait 50ns (pulse width) +9. WAIT UNTIL WRITING IS FINISHED + (we can poll D7 to check if write cycle is finished - do we want to do that?) +10. to write next byte, continue at step 3. + + +Page writing +------------ +/* TODO */ + + diff --git a/prog_tool/eepprog.py b/prog_tool/eepprog.py new file mode 100755 index 0000000..c127fbf --- /dev/null +++ b/prog_tool/eepprog.py @@ -0,0 +1,137 @@ +#!/usr/bin/env python3 + +import sys +import getopt +import serial + +# Global variables for program parameters +verbose = False +serial_device = "/dev/ttyUSB0" +serial_baudrate = 9600 +command = "" + +# Valid commands +valid_commands = ("test") + + +def usage(): + """Prints help text.""" + + print(f""" +Usage: {sys.argv[0]} [OPTIONS] COMMAND [ARGS] + +Commands: + test first test command... + +Options: + -h, --help show this help message and exit + -v, --verbose be verbose + -d DEVICE, --device=DEVICE use DEVICE as serial device + (default: /dev/ttyUSB0) +"""[1:-1]) + + +def parse_args(): + """Parse command line arguments and set global variables.""" + + # Global variables for program options (yes, yes, I know...) + global verbose, serial_device, serial_baudrate, command + + try: + # Try to parse argument strings + optlist, args = getopt.gnu_getopt( + sys.argv[1:], + "hvd:", + ["help", "verbose", "device="] + ) + except getopt.GetoptError as err: + # Invalid option, print help and exit + print(err, "\n") + usage() + sys.exit(2) + + # Parse all the options + for opt, val in optlist: + if opt == "-h" or opt == "--help": + # Print help + usage() + sys.exit() + + elif opt == "-v" or opt == "--verbose": + # Verbose + verbose = True + + elif opt == "-d" or opt == "--device": + # Set device filename + serial_device = val + + else: + assert False, "unhandled option" + + # Parse command argument + if len(args) == 0: + print("missing command\n") + usage() + sys.exit(2) + else: + # Get command and remove argument + command = args.pop(0) + + # Check if command is valid + if command not in valid_commands: + print("invalid command '" + command + "'\n") + usage() + sys.exit(2) + + # Check if command has valid arguments + # TODO + + +def setup_serial(): + """Setup serial device.""" + + if verbose: + print(f"setting up serial device '{serial_device}' with baudrate " + f"{serial_baudrate}") + + # Setup serial device + ser = serial.Serial(serial_device, serial_baudrate) + return ser + + +def command_test(ser): + """Command 'test': Does some testing.""" + + if verbose: + print("running command 'test' ...") + + # Write a test command + # TODO do a HELLO first + ser.write(b"TESTREAD\n") + + # Just read some stuff + while True: + print("read: ", ser.readline(80)) + + +def main(): + """Main function. Does the thing.""" + + # Parse program arguments + parse_args() + + # Setup serial device + ser = setup_serial() + + # Run command + if command == "test": + command_test(ser) + else: + assert False, "unhandled command" + + # Close serial device + ser.close() + + +# Run program +main()